The project scope is to develop new radio technology for 5G.
The job involves leading the testbench development and participate in the IP design verification within Ericsson’s digital ASIC & FPGA projects.
Example of tasks:
Most of the verification uses constrained random methodology but also dedicated test-vectors and assertions are used.
The work will be carried out in a cross functional team using Agile ways of working.
Location: Lund
Start date: As soon as possible
Duration: until 19-12-31, extension possible
To apply for this and similar positions, please use the ”SKICKA ANSÖKAN” form in the sidebar. You can also apply by sending your CV (in English or Swedish) to cv@paventia.se.
If you have questions, please contact Ola Svensson at +46 708 190 200 or ola.svensson@paventia.se.
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